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CONCEPT PRACTICE

Shifting bit positions

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2023 Spring · Morning · Q22

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Q22. At the rising edge of the clock signal, the content of an 8-bit serial-in parallel-out shift register is shifted upward, while positive logic data is simultaneously read into the least significant bit. The value is fixed at the rising edge of a strobe. When the results of an observation of each signal’s waveform are as shown in the diagram below, which of the following is the value of the shift register after it is fixed? Here, numeric values are represented in hexadecimal. Data Strobe Clock Time Source visual transcription: The clock has ten rising edges shown. Before the rising strobe, the first nine rising edges sample data1,1,0,0,0,1,1,0,1;the tenth rising edge follows the strobe. Strobe fixes the eight-bit output.

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Source: 2023S_FE_AM_Questions.pdf, PDF page 10. ID: 2023S-AM-Q022. Explanation written for this textbook.

Original question · Q22
Q22. At the rising edge of the clock signal, the content of an 8-bit serial-in parallel-out shift register is shifted upward, while positive logic data is simultaneously read into the least significant bit. The value is fixed at the rising edge of a strobe. When the results of an observation of each signal’s waveform are as shown in the diagram below, which of the following is the value of the shift register after it is fixed? Here, numeric values are represented in hexadecimal. Data Strobe Clock Time Source visual transcription: The clock has ten rising edges shown. Before the rising strobe, the first nine rising edges sample data1,1,0,0,0,1,1,0,1;the tenth rising edge follows the strobe. Strobe fixes the eight-bit output.

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